BF1100WR,115 NXP

DISCRETE SEMICONDUCTORS DATA SHEET BF1100WR Dual-gate MOS-FET Product specification 1995 Apr 25NXP Semiconductors Product specification Dual-gate MOS-FET BF1100WR FEATURES PINNING Specially designed for use at 9 to 12 V supply voltage PIN SYMBOL DESCRIPTION Short channel transistor with high forward transfer 1s, b source admittance to input capacitance ratio 2 d drain Low noise gain controlled amplifier up to 1 GHz 3g gate 2 2 Superior cross-modulation performance during AGC. 4g gate 1 1 APPLICATIONS d handbook, halfpage VHF and UHF applications such as television tuners and professional communications equipment. 34 DESCRIPTION g 2 Enhancement type field-effect transistor in a plastic g microminiature SOT343R package. The transistor 1 consists of an amplifier MOS-FET with source and substrate interconnected and an internal bias circuit to 21 ensure good cross-modulation performance during AGC. s,b Top view MAM192 CAUTION Marking code: MF. The device is supplied in an antistatic package. The gate-source input must be protected against static Fig.1 Simplified outline (SOT343R) and symbol. discharge during transport or handling. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V drain-source voltage 14 V DS I drain current 30 mA D P total power dissipation 280 mW tot T operating junction temperature 150 C j y forward transfer admittance 24 28 33 mS fs C input capacitance at gate 1 2.2 2.6 pF ig1-s C reverse transfer capacitance f = 1 MHz 25 35 fF rs F noise figure f = 800 MHz 2 dB 1995 Apr 25 2