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The switch node has Max r = 22 m at V = 10 V, I = 6 A DS(on) GS D been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and Max r = 34 m at V = 4.5 V, I = 5 A DS(on) GS D synchronous MOSFET (Q2) have been designed to provide optimal power efficiency. Q2: N-Channel Max r = 10 m at V = 10 V, I = 8.5 A DS(on) GS D Applications Max r = 13.5 m at V = 4.5 V, I = 7.2 A DS(on) GS D Mobile Computing RoHS Compliant Mobile Internet Devices General Purpose Point of Load Bottom Bottom V IN D1 V Q 2 IN D1 5 4 Pin 1 V D1 IN G HS G1 V IN D1 6 3 7 2 GND S2 GND S2 GND 8 1 S2 Q 1 G LS G2 Power33 MOSFET Maximum Ratings T = 25C unless otherwise noted C Symbol Parameter Q1 Q2 Units V Drain to Source Voltage 30 30 V DS V Gate to Source Voltage (Note 4) 20 20 V GS Drain Current -Continuous (Package limited) T = 25 C 18 13 C -Continuous (Silicon limited) T = 25 C 23 46 C I A D 1a 1b -Continuous T = 25 C 7 13 A -Pulsed 40 27 E Single Pulse Avalanche Energy (Note 3) 12 32 AS 1a 1b Power Dissipation for Single Operation T = 25C 1.9 2.5 A P W D 1c 1d Power Dissipation for Single Operation T = 25C 0.7 1.0 A T , T Operating and Storage Junction Temperature Range -55 to +150 C J STG Thermal Characteristics 1a 1b R Thermal Resistance, Junction to Ambient 65 50 JA 1c 1d R Thermal Resistance, Junction to Ambient 180 125 C/W JA R Thermal Resistance, Junction to Case 7.5 4.2 JC Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMC7200S FDMC7200S Power 33 13 12 mm 3000 units 2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMC7200S Rev.C4 D2/S1 SWITCH NODE