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V = 10 V, I = 1.25 A D DS(on) GS using Fairchild Semiconductors proprietary planar stripe and Low Gate Charge (Typ. 10 nC) DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to Low Crss (Typ. 8.5 pF) provide superior switching performance and high avalanche 100% Avalanche Tested energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and electronic lamp ballasts. D G G D S I-PAK S Absolute Maximum Ratings TC = 25C unless otherwise noted. Symbol Parameter Unit FQU3N50CTU V Drain-Source Voltage 500 V DSS I Drain Current - Continuous (T = 25C) 2.5 A D C - Continuous (T = 100C) 1.5 A C (Note 1) I Drain Current - Pulsed 10 A DM V Gate-Source Voltage 30 V GSS (Note 2) E Single Pulsed Avalanche Energy 200 mJ AS (Note 1) I Avalanche Current 2.5 A AR (Note 1) E Repetitive Avalanche Energy 3.5 mJ AR (Note 3) dv/dt Peak Diode Recovery dv/dt 4.5 V/ns P Power Dissipation (T = 25C) 35 W D C - Derate above 25C 0.28 W/C T , T Operating and Storage Temperature Range -55 to +150 C J STG Maximum lead temperature for soldering, T 300 C L 1/8 from case for 5 seconds Thermal Characteristics Symbol Parameter FQU3N50CTU Unit R Thermal Resistance, Junction-to-Case, Max. 3.5 C/W JC R Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max. 110 C/W JA R Thermal Resistance, Junction to Ambient (*1 in2 Pad of 2-oz Copper), Max. 50 C/W JA www.fairchildsemi.com 2008 Fairchild Semiconductor Corporation 1 FQU3N50C Rev C1