HUF76609D3S Data Sheet October 20 13 N-Channel Logic Level UltraFET Power MOSFET 100 V, 10 A, 165 m Packaging Features JEDEC TO-252AA Ultra Low On-Resistance -r = 0.160, V = 10V GS DS(ON) DRAIN (FLANGE) -r = 0.165, V = 5V DS(ON) GS Simulation Models GATE - Temperature Compensated PSPICE and SABER Electrical Models SOURCE - Spice and SABER Thermal Impedance Models - www.Fairchildsemi.com Peak Current vs Pulse Width Curve UIS Rating Curve Symbol Switching Time vs R Curves GS D Ordering Information PART NUMBER PACKAGE BRAND G HUF76609D3ST TO- 252AA 76609D S o Absolute Maximum Ratings T = 25 C, Unless Otherwise Specified C HUF76609D3S T UNITS Drain to Source Voltage (Note 1) . V 100 V DSS Drain to Gate Voltage (R = 20k ) (Note 1) . V 100 V GS DGR Gate to Source Voltage .V 16 V GS Drain Current o Continuous (T = 25 C, V = 5V) . I 10 A C GS D o Continuous (T = 25 C, V = 10V) (Figure 2) I 10 A C GS D o Continuous (T = 100 C, V = 5V) . I 7 A C GS D o Continuous (T = 100 C, V = 4.5V) (Figure 2) . I 7 A C GS D Pulsed Drain Current . I Figure 4 DM Pulsed Avalanche Rating . UIS Figures 6, 17, 18 Power Dissipation P 49 W D o o Derate Above 25 C . 0.327 W/ C o Operating and Storage Temperature . T , T -55 to 175 C J STG Maximum Temperature for Soldering o Leads at 0.063in (1.6mm) from Case for 10s T 300 C L o Package Body for 10s, See Techbrief TB334 . T 260 C pkg NOTE: o o 1. T = 25 C to 150 C. J CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Product reliability information can be found at HUF76609D3S o Electrical Specifications T = 25 C, Unless Otherwise Specified C PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage BV I = 250 A, V = 0V (Figure 12) 100 - - V DSS D GS o I = 250 A, V = 0V, T = -40 C (Figure 12) 90 - - V D GS C Zero Gate Voltage Drain Current I V = 95V, V = 0V - - 1 A DSS DS GS o V = 90V, V = 0V, T = 150 C - - 250 A DS GS C Gate to Source Leakage Current I V = 16V - - 100 nA GSS GS ON STATE SPECIFICATIONS Gate to Source Threshold Voltage V V = V , I = 250A (Figure 11) 1 - 3 V GS(TH) GS DS D Drain to Source On Resistance r I = 10A, V = 10V (Figures 9, 10) - 0.130 0.160 DS(ON) D GS I = 7A, V = 5V (Figure 9) - 0.135 0.165 D GS I = 7A, V = 4.5V (Figure 9) - 0.140 0.168 D GS THERMAL SPECIFICATIONS o Thermal Resistance Junction to Case R TO-252 - - 3.06 C/W JC o Thermal Resistance Junction to R - - 100 C/W JA Ambient SWITCHING SPECIFICATIONS (V = 4.5V) GS Turn-On Time t V = 50V, I = 7A - - 77 ns ON DD D V = 4.5V, R = 20 GS GS Turn-On Delay Time t -10- ns d(ON) (Figures 15, 21, 22) Rise Time t -41- ns r Turn-Off Delay Time t -30- ns d(OFF) Fall Time t -28- ns f Turn-Off Time t - - 87 ns OFF SWITCHING SPECIFICATIONS (V = 10V) GS Turn-On Time t V = 50V, I = 10A - - 36 ns ON DD D V = 10V, GS Turn-On Delay Time t -6 - ns d(ON) R = 24 GS Rise Time t -18- ns r (Figures 16, 21, 22) Turn-Off Delay Time t -55- ns d(OFF) Fall Time t - 39 - ns f Turn-Off Time t - - 141 ns OFF GATE CHARGE SPECIFICATIONS V = 0V to 10V V = 50V, Total Gate Charge Q -13 16 nC g(TOT) GS DD I = 7A, D Gate Charge at 5V Q V = 0V to 5V - 7.3 8.8 nC g(5) GS I = 1.0mA g(REF) Threshold Gate Charge Q V = 0V to 1V - 0.5 0.6 nC g(TH) GS (Figures 14, 19, 20) Gate to Source Gate Charge Q -1.4 - nC gs Gate to Drain Miller Charge Q -3.4 - nC gd CAPACITANCE SPECIFICATIONS Input Capacitance C V = 25V, V = 0V, - 425 - pF ISS DS GS f = 1MHz Output Capacitance C -75- pF OSS (Figure 13) Reverse Transfer Capacitance C -22- pF RSS Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage V I = 7A - - 1.25 V SD SD I = 4A - - 1.0 V SD Reverse Recovery Time t I = 7A, dI /dt = 100A/s- -92ns rr SD SD Reverse Recovered Charge Q I = 7A, dI /dt = 100A/s - - 273 nC RR SD SD 2001 Fairchild Semiconductor Corporation HUF76609D3S Rev. C0