Doc No. TT4-EA-15079 Revision. 1 Product Standards MOS FET FC4B21320L1 FC4B21320L1 Gate resistor installed Dual N-channel MOS FET Unit: mm For lithium-ion secondary battery protection circuits 0.8 4 3 Features Source-source ON resistance:Rss(on) typ. = 39 mW VGS = 3.8 V) 1 2 CSP(Chip Size Package) RoHS compliant (EU RoHS / MSL:Level 1 compliant) 0.2 Marking Symbol: 2D Packaging 0.4 (0.2) (0.2) Embossed type (Thermo-compression sealing) : 1 000 pcs / reel (standard) 1. Source1 (FET1) 3. Gate2 (FET2) 2. Gate1 (FET1) 4. Source2 (FET2) Absolute Maximum Ratings Ta = 25 C Panasonic XLGA004-W-0808-RA Parameter Symbol Rating Unit JEITA VSS 12 V Code Source-source Voltage Gate-source Voltage VGS 8 V *1 2.5 A IS Equivalent circuit Source Current (DC) *2 4 A IS *3 Source Current (Pulsed) 25 A ISp *1 0.34 W PD Total Power Dissipation *2 0.9 W PD Channel Temperature Tch 150 C Tstg -55 to +150 Storage Temperature Range C FET2 *1 368 C/W Rth Thermal Resistance (ch-a) *2 139 C/W Rth Note *1 Mounted on FR4 board ( 25.4 mm 25.4 mm t1.0 mm ) FET1 using the minimum recommended pad size (36mm Copper ). *2 Mounted on Ceramic substrate (70 mm 70 mm t1.0 mm). *3 t = 10 ms, Duty Cycle 1 % Page 1 of 5 Established : 2015-10-23 Revised : - - 0.8 0.4 0.1Doc No. TT4-EA-15079 Revision. 1 Product Standards MOS FET FC4B21320L1 Electrical Characteristics Ta = 25 C 3 C Parameter Symbol Conditions Min Typ Max Unit Source-source Breakdown Voltage VSSS IS = 1 mA, VGS = 0 V 12 V Zero Gate Voltage Source Current ISSS VSS = 12 V, VGS = 0 V 1.0 mA VGS = 8 V, VSS = 0 V 10 Gate-source Leakage Current IGSS mA VGS = 5 V, VSS = 0 V 1.0 Gate-source Threshold Voltage Vth IS = 0.07 mA, VSS = 10 V 0.35 0.9 1.4 V RSS(on)1 IS = 1.25 A, VGS = 4.5 V 27 36 48 RSS(on)2 IS = 1.25 A, VGS = 3.8 V 29 39 53 Source-source On-state Resistance mW RSS(on)3 IS = 1.25 A, VGS = 3.1 V 32 45 75 RSS(on)4 IS = 1.25 A, VGS = 2.5 V 35 58 115 VF(s-s) IF = 1.25 A, VGS = 0 V 0.6 1.2 V Body Diode Forward Voltage *1 Ciss 205 Input Capacitance *1 Coss VSS = 10 V, VGS = 0 V, f = 1 MHz 50 pF Output Capacitance *1 Crss 40 Reverse Transfer Capacitance *1,*2 td(on) VDD = 10 V, VGS = 0 to 4.0 V 0.10 Turn-on delay Time ms *1,*2 tr IS = 1.25 A 0.15 Rise Time *1,*2 td(off) VDD = 10 V, VGS = 4.0 to 0 V 0.50 Turn-off delay Time ms *1,*2 tf IS = 1.25 A 0.30 Fall Time *1 Qg 3.5 Total Gate Charge VDD = 10 V *1 Qgs VGS = 0 to 4.0 V, 0.8 nC Gate-source Charge *1 IS = 1.25 A Gate-drain Charge Qgd 1.0 Note Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. *1 Guaranteed by design, not subject to production testing *2 Measurement circuit for Turn-on Delay Time / Rise Time / Turn-off Delay Time / Fall Time Note2 : Measurement circuit VDD = 10 V IS = 1.25 A RL = 8 W Vout 90 % S2 Vin 10 % Rg G2 90 % 90 % Vout Rg G1 Vin 10 % 10 % 4 V 50 W S1 0 V td(on) tr td(off) tf PW = 10 ms D.C. 1 % Page 2 of 5 Established : 2015-10-23 Revised : - -