1.9 mm Si5459DU www.vishay.com Vishay Siliconix P-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET power MOSFET a V (V) R ( )I (A) Q (TYP.) DS DS(on) D g 100 % R tested e g 0.052 at V = -4.5 V -8 GS -20 8 Material categorization: 0.082 at V = -2.5 V -7.5 GS for definitions of compliance please see www.vishay.com/doc 99912 PowerPAK ChipFET Single D APPLICATIONS S DD 88 DD 77 SS Load switch 66 55 HDD DC/DC 1 G 2 S D 3 D 9 4 D 11 G Top View Bottom View Ordering Information: D Si5459DU-T1-GE3 (Lead (Pb)-free and halogen-free) P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V -20 DS V Gate-Source Voltage V 12 GS e T = 25 C -8 C e T = 70 C -8 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C -6.7 A b, c T = 70 C -5.3 A A Pulsed Drain Current (10 s pulse width) I -20 DM e T = 25 C -8 C Source-Drain Current Diode Current I S b, c T = 25 C -2.9 A T = 25 C 10.9 C T = 70 C 7 C Maximum Power Dissipation P W D b, c T = 25 C 3.5 A b, c T = 70 C 2.2 A Operating Junction and Storage Temperature Range T , T -50 to 150 J stg C d, e Soldering Recommendations (Peak temperature) 260 THERMAL RESISTANCE RATINGS LIMIT PARAMETER SYMBOL UNIT TYPICAL MAXIMUM b, d Maximum Junction-to-Ambient t 10 s R 30 36 thJA C/W Maximum Junction-to-Case (Drain) Steady State R 9.5 11.5 thJC Notes a. Based on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. Maximum under steady state conditions is 72 C/W. e. Package limited. f. See solder profile (www.vishay.com/doc 73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. g. Rework conditions: Manual soldering with a soldering iron is not recommended for leadless components. S16-0980-Rev. C, 23-May-16 Document Number: 65017 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 3.03.0 mmmmSi5459DU www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J a PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = -250 A -20 - - V DS GS D V Temperature Coefficient V /T --19 - DS DS J I = -250 A mV/C D V Temperature Coefficient V /T -3.1 - GS(th) GS(th) J Gate Threshold Voltage V V = V , I = -250 A -0.6 - -1.4 V GS(th) DS GS D Gate-Body Leakage I V = 0 V, V = 12 V - - -100 nA GSS DS GS V = -20 V, V = 0 V - - -1 DS GS Zero Gate Voltage Drain Current I A DSS V = -20 V, V = 0 V, T = 55 C - - -10 DS GS J b On-State Drain Current I V = -5 V, V = -10 V -20 - - A D(on) DS GS V = -4.5 V, I = -6.7 A - 0.043 0.052 GS D b Drain-Source On-State Resistance R DS(on) V = -2.5 V, I = -1 A - 0.068 0.082 GS D b Forward Transconductance g V = -10 V, I = -6.7 A - 11 - S fs DS D a Dynamic Input Capacitance C - 665 - iss Output Capacitance C V = -10 V, V = 0 V, f = 1 MHz - 140 - pF oss DS GS Reverse Transfer Capacitance C - 115 - rss V = -10 V, V = -10 V, I = -6.7 A - 17 26 DS GS D Total Gate Charge Q g -8 12 nC Gate-Source Charge Q V = -10 V, V = -4.5 V, I = -6.7 A -2 - gs DS GS D Gate-Drain Charge Q -3- gd Gate Resistance R f = 1 MHz 1.2 6 12 g Turn-On Delay Time t -6 12 d(on) Rise Time t -15 23 r V = -10 V, R = 1.9 DD L I -5.3 A, V = -10 V, R = 1 Turn-Off Delay Time t -2D GEN g639 d(off) Fall Time t -9 18 f ns Turn-On Delay Time t -21 32 d(on) Rise Time t -50 75 r V = -10 V, R = 1.9 DD L I -5.3 A, V = -4.5 V, R = 1 Turn-Off Delay Time t -2D GEN g944 d(off) Fall Time t -13 20 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode I T = 25 C - - -8 S C Current A a Pulse Diode Forward Current I -- -20 SM Body Diode Voltage V I = -5.3 A - -0.77 -1.2 V SD S Body Diode Reverse Recovery Time t -30 45 ns rr Body Diode Reverse Recovery Charge Q -17 26 nC rr I = -5.3 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t -16 - a ns Reverse Recovery Rise Time t -14 - b Notes a. Guaranteed by design, not subject to production testing. b. Pulse test pulse width 300 s, duty cycle 2 %. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S16-0980-Rev. C, 23-May-16 Document Number: 65017 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000