Si7852DP Vishay Siliconix N-Channel 80-V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 V (V) R ()I (A) DS DS(on) D Available 0.0165 at V = 10 V TrenchFET Power MOSFETS 12.5 GS 80 New Low Thermal Resistance PowerPAK 0.022 at V = 6 V 10.9 GS Package with Low 1.07 mm Profile PWM Optimized for Fast Switching 100 % R Tested g PowerPAK SO-8 APPLICATIONS Primary Side Switch for DC/DC Applications S 6.15 mm 5.15 mm 1 S 2 S 3 G 4 D D 8 D 7 D 6 D G 5 Bottom View S Ordering Information: Si7852DP-T1-E3 (Lead (Pb)-free) N-Channel MOSFET Si7852DP-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS T = 25 C, unless otherwise noted A Parameter Symbol 10 s Steady State Unit Drain-Source Voltage V 80 DS V V Gate-Source Voltage 20 GS T = 25 C 12.5 7.6 A a I Continuous Drain Current (T = 150 C) D J T = 70 C 10.0 6.1 A Pulsed Drain Current I 50 A DM I Avalanche Current L = 0.1 mH 40 AS a I 4.7 1.7 Continuous Source Current (Diode Conduction) S T = 25 C 5.2 1.9 A a P W Maximum Power Dissipation D T = 70 C 3.3 1.2 A T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C b, c 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit t 10 s 19 24 a R Maximum Junction-to-Ambient thJA Steady State 52 65 C/W R Maximum Junction-to-Case (Drain) Steady State 1.5 1.8 thJC Notes: a. Surface Mounted on 1 x 1 FR4 board. b. See Solder Profile (www.vishay.com/ppg 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. Document Number: 71627 www.vishay.com S09-0268-Rev. E, 16-Feb-09 1Si7852DP Vishay Siliconix SPECIFICATIONS T = 25 C, unless otherwise noted J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static V V = V , I = 250 A Gate Threshold Voltage 2.0 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Body Leakage 100 nA GSS DS GS V = 80 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 80 V, V = 0 V, T = 55 C 5 DS GS J a I V 5 V, V = 10 V 50 A On-State Drain Current D(on) DS GS V = 10 V, I = 10 A 0.0135 0.0165 GS D a R Drain-Source On-State Resistance DS(on) V = 6.0 V, I = 8.0 A 0.0175 0.022 GS D a g V = 15 V, I = 10 A 25 S Forward Transconductance fs DS D a V I = 2.8 A, V = 0 V 0.75 1.1 V Diode Forward Voltage SD S GS b Dynamic Total Gate Charge Q 34 41 g Q V = 40 V, V = 10 V, I = 10 A Gate-Source Charge 7.5 nC gs DS GS D Gate-Drain Charge Q 11.0 gd R Gate Resistance 0.1 0.6 1 g Turn-On Delay Time t 17 25 d(on) t Rise Time V = 40 V, R = 40 11 17 r DD L I 1.0 A, V = 10 V, R = 6 Turn-Off Delay Time t 40 60 ns D GEN g d(off) t Fall Time 31 45 f Source-Drain Reverse Recovery Time t I = 2.8 A, dI/dt = 100 A/s 45 75 rr F Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 50 50 V = 10 V thru 6 V GS 40 40 30 30 20 5 V 20 T = 125 C C 10 10 25 C - 55 C 3 V, 4 V 0 0 0 123 45 0 2468 10 V - Drain-to-Source Voltage (V) V - Gate-to-Source V oltage (V) GS DS Output Characteristics Transfer Characteristics www.vishay.com Document Number: 71627 2 S09-0268-Rev. E, 16-Feb-09 I - Drain Current (A) D I - Drain Current (A) D