SiA477EDJ Vishay Siliconix P-Channel 12 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET a V (V) R ( ) Max. Q (Typ.) Thermally Enhanced PowerPAK I (A) DS DS(on) g D SC-70 Package 0.0140 at V = - 4.5 V - 12 GS - Small Footprint Area 0.0160 at V = - 3.7 V - 12 GS - 12 34.7 nC - Low On-Resistance 0.0190 at V = - 2.5 V - 12 GS 100 % R Tested 0.0330 at V = - 1.8 V - 12 g GS Built in ESD Protection with Zener Diode PowerPAK SC-70-6L-Single Typical ESD Performance: 3800 V (HBM) Material categorization: For definitions of compliance 1 please see www.vishay.com/doc 99912 D 2 APPLICATIONS D 3 S Portable Devices such as G D Smart Phones, Tablet PCs 6 D S and Mobile Computing 5 - Battery Switch 2.05 mm 2.05 mm S 4 - Load Switch G - Power Management Marking Code BX X Part code X X X Lot Traceability and Date code D Ordering Information: SiA477EDJ-T1-GE3 (Lead (Pb)-free and Halogen-free) P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit - 12 Drain-Source Voltage V DS V 8 Gate-Source Voltage V GS a T = 25 C - 12 C a T = 70 C - 12 C Continuous Drain Current (T = 150 C) I J D a,b, c T = 25 C - 12 A b, c T = 70 C - 10.6 A A - 40 Pulsed Drain Current (t = 300 s) I DM a T = 25 C - 12 C Continuous Source-Drain Diode Current I S b, c T = 25 C - 2.9 A T = 25 C 19 C T = 70 C 12 C Maximum Power Dissipation P W D b, c T = 25 C 3.5 A b, c T = 70 C 2.2 A - 55 to 150 Operating Junction and Storage Temperature Range T , T J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 5 s R 28 36 Maximum Junction-to-Ambient thJA C/W 5.3 6.5 Maximum Junction-to-Case (Drain) Steady State R thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 5 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SC-70 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 80 C/W. Document Number: 62798 www.vishay.com For technical questions, contact: pmostechsupport vishay.com S12-3080-Rev. A, 24-Dec-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiA477EDJ Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static V V = 0 V, I = - 250 A Drain-Source Breakdown Voltage - 12 V DS GS D V Temperature Coefficient V /T - 4 DS DS J I = - 250 A mV/C D V Temperature Coefficient V /T 2.9 GS(th) GS(th) J V V = V , I = - 250 A Gate-Source Threshold Voltage - 0.4 - 1 V GS(th) DS GS D V = 0 V, V = 8 V 30 DS GS I Gate-Source Leakage GSS V = 0 V, V = 4.5 V 1 DS GS A V = - 12 V, V = 0 V - 1 DS GS I Zero Gate Voltage Drain Current DSS V = - 12 V, V = 0 V, T = 55 C - 10 DS GS J a I V - 5 V, V = - 4.5 V - 20 A On-State Drain Current D(on) DS GS V = - 4.5 V, I = - 7 A 0.0116 0.0140 GS D V = - 3.7 V, I = - 5 A 0.0130 0.0160 GS D a R Drain-Source On-State Resistance DS(on) V = - 2.5 V, I = - 3 A 0.0158 0.0190 GS D V = - 1.8 V, I = - 1 A 0.0250 0.0330 GS D a g V = - 6 V, I = - 7 A 31 S Forward Transconductance fs DS D b Dynamic Input Capacitance C 2970 iss Output Capacitance C V = - 6 V, V = 0 V, f = 1 MHz 710 pF oss DS GS Reverse Transfer Capacitance C 724 rss V = - 6 V, V = - 8 V, I = - 13.3 A Total Gate Charge 58 87 DS GS D Q g 34.7 52 Gate-Source Charge nC Q V = - 6 V, V = - 4.5 V, I = - 13.3 A 5.5 gs DS GS D Q Gate-Drain Charge 7.8 gd R Gate Resistance f = 1 MHz 1 5 10 g Turn-On Delay Time t 30 45 d(on) t Rise Time V = - 6 V, R = 0.6 28 42 r DD L I - 10 A, V = - 4.5 V, R = 1 Turn-Off Delay Time t 74 111 D GEN g d(off) t Fall Time 45 68 f ns Turn-On Delay Time t 10 20 d(on) t Rise Time V = - 6 V, R = 0.6 918 r DD L - 10 A, V = - 8 V, R = 1 I Turn-Off Delay Time t 80 120 d(off) D GEN g t Fall Time 40 60 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current - 12 S C A I Pulse Diode Forward Current - 40 SM V I = - 10 A, V = 0 V Body Diode Voltage - 0.8 - 1.2 V SD S GS t Body Diode Reverse Recovery Time 18 27 ns rr Q Body Diode Reverse Recovery Charge 612 nC rr I = - 10 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t 11 a ns t Reverse Recovery Rise Time 7 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 62798 For technical questions, contact: pmostechsupport vishay.com 2 S12-3080-Rev. A, 24-Dec-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000