ATF-501P8
[1]
High Linearity Enhancement Mode Pseudomorphic HEMT
2 [3]
in 2x2 mm LPCC Package
Data Sheet
Description Features
Avago Technologiess ATF-501P8 is a single-voltage high
Single voltage operation
linearity, low noise E-pHEMT housed in an 8-lead JEDEC-
High Linearity and P1dB
[3]
standard leadless plastic chip carrier (LPCC ) package.
Low Noise Figure
The device is ideal as a medium-power amplifier. Its
operating frequency range is from 400 MHz to 3.9 GHz.
Excellent uniformity in product specifications
3
Small package size: 2.0 x 2.0 x 0.75 mm
The thermally efficient package measures only 2mm
x 2mm x 0.75mm. Its backside metalization provides [2]
Point MTTF > 300 years
excellent thermal dissipation as well as visual evidence
MSL-1 and lead-free
of solder reflow. The device has a Point MTTF of over 300
years at a mounting temperature of +85C. All devices Tape-and-Reel packaging option available
are 100% RF & DC tested.
Specifications
Notes:
1. Enhancement mode technology employs a single positive V ,
gs
2 GHz; 4.5V, 280 mA (Typ.)
eliminating the need of negative gate voltage associated with
conventional depletion mode devices. 45.5 dBm Output IP3
2. Refer to reliability datasheet for detailed MTTF data.
29 dBm Output Power at 1dB gain compression
3. Conforms to JEDEC reference outline MO229 for DRP-N.
4. Linearity Figure of Merit (LFOM) is essentially OIP3 divided by DC bias
1 dB Noise Figure
power.
15 dB Gain
[4]
14.5 dB LFOM
Pin Connections and Package Marking
65% PAE
Pin 8 Pin 1 (Source)
o
23 C/W thermal resistance
Pin 7 (Drain) Pin 2 (Gate)
Pin 6 Pin 3
Applications
Pin 5 Pin 4 (Source)
Front-end LNA Q2 and Q3, Driver or Pre-driver
Bottom View
Amplifier for Cellular/PCS and WCDMA wireless
infrastructure
Pin 1 (Source) Pin 8
Driver Amplifier for WLAN, WLL/RLL and MMDS
applications
Pin 2 (Gate) Pin 7 (Drain)
0Px General purpose discrete E-pHEMT for other high
Pin 3 Pin 6
linearity applications
Pin 4 (Source) Pin 5
Top View
Attention: Observe precautions for
Note: handling electrostatic sensitive devices.
Package marking provides orientation and identification: ESD Machine Model (Class A)
0P = Device Code
ESD Human Body Model (Class 1C)
x = Date code indicates the month of manufacture.
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Source
(Thermal/RF Gnd)[1]
ATF-501P8 Absolute Maximum Ratings
Notes:
Absolute 1. Operation of this device in excess of
any one of these parameters may cause
Symbol Parameter Units Maximum
permanent damage.
[2]
2. Assumes DC quiescent conditions.
V DrainSource Voltage V 7
DS
3. Board (package belly) temperatureT is
B
[2]
V GateSource Voltage V -5 to 0.8
GS
25C. Derate 43.5 mW/C for T > 69.5C.
B
[2] 4. Channel-to-board thermal resistance
V Gate Drain Voltage V -5 to 1
GD
measured using 150C Liquid Crystal
[2]
I Drain Current A 1
DS Measurement method.
I Gate Current mA 12
GS
[3]
P Total Power Dissipation W 3.5
diss
P RF Input Power dBm 30
in max.
T Channel Temperature C 150
CH
T Storage Temperature C -65 to 150
STG
[4]
Thermal Resistance C/W 23
ch_b
[5,6]
Product Consistency Distribution Charts at 2 GHz, 4.5V, 200 mA
120
800 120
Cpk=1.76 Cpk=1.51
Vgs=0.7V
700
Stdev=0.3 Stdev=3.38
100 100
600
Vgs=0.65V
80 80
500
Vgs=0.6V
3 Std +3 Std 3 Std +3 Std
60 60
400
Vgs=0.55V
300
40 40
200
Vgs=0.5V
20 20
100
0 0
0
0 1 2 3 4 5 6
27.5 28 28.5 29 29.5 30 30.5 45 55 65 75 85
Vds (V) PAE (%)
P1dB (dBm)
Figure 1. Typical IV curve (Vgs = 0.01V) per step. Figure 2. P1dB. Figure 3. PAE.
100 100
Cpk=1.1
Cpk=1.61
Stdev=0.87
Stdev=0.33
80 80
60
60
3 Std +3 Std
3 Std +3 Std
40
40
20
20
0
0
42 43 44 45 46 47 48 49 50
13 14 15 16 17
GAIN (dB) OIP3 (dBm)
Figure 5. OIP3.
Figure 4. Gain.
Notes:
5. Distribution data sample size is 300 samples taken from 3 different wafers and 3 different lots. Future wafers allocated to this product may have
nominal values anywhere between the upper and lower limits.
6. Measurements are made on production test board, which represents a trade-off between optimal OIP3, P1dB and VSWR. Circuit losses have
been de-embedded from actual measurements.
2
Ids (mA)