ATF-55143 Low Noise Enhancement Mode Pseudomorphic HEMT in a Surface Mount Plastic Package Data Sheet Description Features High linearity performance Avago Technologies ATF-55143 is a high dynamic range, 1 very low noise, single supply E-PHEMT housed in a Single Supply Enhancement Mode Technology 4-lead SC-70 (SOT-343) surface mount plastic package. Very low noise fi gure The combination of high gain, high linearity and low Excellent uniformity in product specifi cations noise makes the ATF-55143 ideal for cellular/PCS hand- 400 micron gate width sets, wireless data systems (WLL/RLL, WLAN and MMDS) Low cost surface mount small plastic package SOT- and other systems in the 450 MHz to 6 GHz frequency 343 (4 lead SC-70) range. Tape-and-Reel packaging option available Surface Mount Package SOT-343 Lead Free Option Available Specifi cations 2 GHz 2.7V, 10 mA (Typ.) rd 24.2 dBm output 3 order intercept 14.4 dBm output power at 1 dB gain compression 0.6 dB noise fi gure 17.7 dB associated gain Pin Connections and Package Marking Lead-free option available DRAIN SOURCE Applications Low noise amplifi er for cellular/PCS handsets SOURCE GATE LNA for WLAN, WLL/RLL and MMDS applications General purpose discrete E -PHEMT for other ultra low noise applications Note: Top View. Package marking provides orientation and identifi cation Note: 1. Enhancement mode technology requires positive Vgs, thereby 5F = Device Code eliminating the need for the negative gate voltage associated with x = Date code character identifi es month of manufacture. conventional depletion mode devices. Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model (Class A) ESD Human Body Model (Class 0) Refer to Avago Application Note A004R: Electrostatic Discharge Damage and Control. 5Fx 1 ATF-55143 Absolute Maximum Ratings Absolute Symbol Parameter Units Maximum 2 V Drain-Source Voltage V 5 DS 2 V Gate-Source Voltage V -5 to 1 GS 2 V Gate Drain Voltage V -5 to 1 GD 2 I Drain Current mA 100 DS 5 I Gate Current mA 1 GS 3 P Total Power Dissipation mW 270 diss 5 P RF Input Power in max. (Vds=2.7V, Ids=10mA) dBm 10 (Vds=0V, Ids=0mA) dBm 10 T Channel Temperature C 150 CH T Storage Temperature C -65 to 150 STG 4 Thermal Resistance C/W 235 jc ESD (Human Body Model) V 200 ESD (Machine Model) V 25 Notes: 70 1. Operation of this device above any one of these parameters may 0.7V 60 cause permanent damage. 2. Assumes DC quiescent conditions. 50 3. Source lead temperature is 25C. Derate 4.3 mW/C for T > 87C. L 40 4. Thermal resistance measured using 150C Liquid Crystal Measure- 0.6V ment method. 30 5. Device can safely handle +10 dBm RF Input Power as long as I is GS 0.5V limited to 1 mA. I at P drive level is bias circuit dependent. See 20 GS 1dB applications section for additional information. 10 0.4V 0.3V 0 02143756 V (V) DS Figure 1. Typical I-V Curves. (V = 0.1 V per step) GS 6, 7 Product Consistency Distribution Charts 300 200 240 Cpk = 2.02 Cpk = 1.023 Cpk = 3.64 Stdev = 0.36 Stdev = 0.28 Stdev = 0.031 250 200 160 200 160 120 -3 Std -3 Std +3 Std +3 Std 150 120 80 100 80 40 50 40 0 0 0 22 23 24 25 26 15 16 17 18 19 0.43 0.53 0.63 0.73 0.83 0.93 GAIN (dB) OIP3 (dBm) NF (dB) Figure 3. Gain 2.7 V, 10 mA. Figure 2. OIP3 2.7 V, 10 mA. Figure 4. NF 2.7 V, 10 mA. USL = 18.5, LSL = 15.5, Nominal = 17.7 LSL = 22.0, Nominal = 24.2 USL = 0.9, Nominal = 0.6 Notes: 6. Distribution data sample size is 500 samples taken from 6 diff erent wafers. Future wafers allocated to this product may have nominal values anywhere between the upper and lower limits. 7. Measurements made on production test board. This circuit represents a trade-off between an optimal noise match and a realizeable match based on production test equipment. Circuit losses have been de-embedded from actual measurements. 2 I (mA) DS