STY60NM60 STMicroelectronics

STY60NM60 N-CHANNEL 600V - 0.050 - 60A Max247 Zener-Protected MDmeshPower MOSFET TYPE V R I DSS DS(on) D STY60NM60 600V < 0.055 60 A TYPICAL R (on) = 0.050 DS HIGH dv/dt AND AVALANCHE CAPABILITIES IMPROVED ESD CAPABILITY 3 LOW INPUT CAPACITANCE AND GATE 2 1 CHARGE LOW GATE INPUT RESISTANCE TIGHT PROCESS CONTROL Max247 INDUSTRYS LOWEST ON-RESISTANCE DESCRIPTION The MDmesh is a new revolutionary MOSFET technology that associates the Multiple Drain pro- cess with the Companys PowerMESH horizontal layout. The resulting product has an outstanding low INTERNAL SCHEMATIC DIAGRAM on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Companys proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competitions products. APPLICATIONS The MDmesh family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. ORDERING INFORMATION SALES TYPE MARKING PACKAGE PACKAGING STY60NM60 Y60NM60 Max247 TUBE July 2003 1/8STY60NM60 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V Drain-source Voltage (V =0) 600 V DS GS V Drain-gate Voltage (R =20k) 600 V DGR GS V Gate- source Voltage 30 V GS I Drain Current (continuous) at T = 25C 60 A D C I Drain Current (continuous) at T = 100C 37.8 A D C I ( ) Drain Current (pulsed) 240 A DM P Total Dissipation at T = 25C 560 W TOT C V Gate source ESD(HBM-C=100pF, R=15K) 6KV ESD(G-S) Derating Factor 4.5 W/C dv/dt (1) Peak Diode Recovery voltage slope 15 V/ns T Storage Temperature 65 to 150 C stg T Max. Operating Junction Temperature 150 C j ()Pulse width limited by safe operating area (1) I 60A, di/dt 400 A/s, V V ,T T SD DD (BR)DSS j JMAX. THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.22 C/W Rthj-amb Thermal Resistance Junction-ambient Max 30 C/W T Maximum Lead Temperature For Soldering Purpose 300 C l AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit I Avalanche Current, Repetitive or Not-Repetitive 30 A AR (pulse width limited by T max) j E Single Pulse Avalanche Energy 1.4 J AS (starting T = 25 C, I =I ,V =35V) j D AR DD GATE-SOURCE ZENER DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit BV Gate-Source Breakdown Igs= 1mA (Open Drain) 30 V GSO Voltage PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the devices ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the devices integrity. These integrated Zener diodes thus avoid the usage of external components. 2/8