TSM2NB60 Taiwan Semiconductor N-Channel Power MOSFET 600V, 2A, 4.4 FEATURES KEY PERFORMANCE PARAMETERS Advanced planar process PARAMETER VALUE UNIT 100% avalanche tested V 600 V DS Pb-free plating R (max) 4.4 DS(on) Compliant to RoHS Directive 2011/65/EU and in accordance to WEE 2002/96/EC Q g 9.4 nC Halogen-free according to IEC 61249-2-21 definition APPLICATION Power Supply Lighting TO-220 ITO-220 TO-251(IPAK) TO-252(DPAK) Notes: MSL 3 (Moisture Sensitivity Level) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A LIMIT PARAMETER SYMBOL UNIT IPAK/DPAK ITO-220 TO-220 Drain-Source Voltage V 600 V DS Gate-Source Voltage V 30 V GS T = 25C 2 C (Note 1) Continuous Drain Current I A D T = 100C 1.35 C (Note 2) Pulsed Drain Current I 8 A DM (Note 3) Single Pulsed Avalanche Energy E 55 mJ AS (Note 3) Single Pulsed Avalanche Current I 2 A AS (Note 2) Repetitive Avalanche Energy E 4.4 mJ AR (Note 4) Peak Diode Recovery dv/dt dv/dt 4.5 V/ns Total Power Dissipation T = 25C P 44 25 70 W C DTOT Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG Document Number: DS P0000070 1 Version: F15 TSM2NB60CI TSM2NB60CZ Not Recommended TSM2NB60 Taiwan Semiconductor THERMAL PERFORMANCE LIMIT PARAMETER SYMBOL UNIT IPAK/DPAK ITO-220 TO-220 o Junction to Case Thermal Resistance R 2.87 5 1.78 C/W JC o Junction to Ambient Thermal Resistance R C/W JA 110 62.5 62.5 Notes: R is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined JA at the solder mounting surface of the drain pins. R is guaranteed by design while R is determined by the users board JA CA design. R shown below for single device operation on FR-4 PCB in still air JA ELECTRICAL SPECIFICATIONS (T = 25C unless otherwise noted) A PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 5) Static Drain-Source Breakdown Voltage V = 0V, I = 250uA BV 600 -- -- V GS D DSS Gate Threshold Voltage V = V , I = 250uA V 2.5 3.6 4.5 V DS GS D GS(TH) Gate Body Leakage V = 30V, V = 0V I -- -- 100 nA GS DS GSS Zero Gate Voltage Drain Current V = 600V, V = 0V I -- -- 10 uA DS GS DSS V = 10V, I = 1A R -- 3.9 4.4 Drain-Source On-State Resistance GS D DS(ON) V = 40V, I = 1A g -- 1.5 -- S Forward Transfer Conductance DS D fs (Note 6) Dynamic Total Gate Charge Q -- 9.4 -- g V = 480V, I = 2A, DS D Gate-Source Charge Q -- 2.2 -- gs nC V = 10V GS Gate-Drain Charge Q -- 4.7 -- gd Input Capacitance C -- 249 -- iss V = 25V, V = 0V, DS GS Output Capacitance C -- 30.7 -- pF oss f = 1.0MHz Reverse Transfer Capacitance C -- 5 -- rss Gate Resistance F = 1MHz, open drain R -- 8.5 -- g (Note 7) Switching Turn-On Delay Time t -- 9.1 -- d(on) Turn-On Rise Time t -- -- r 9.8 V = 10V, I = 2A, GS D ns Turn-Off Delay Time V = 300V, R =25 t -- 17.4 -- DD G d(off) Turn-Off Fall Time t -- 12.4 -- f Document Number: DS P0000070 2 Version: F15 TSM2NB60CI TSM2NB60CZ Not Recommended