SSM3K44FS TOSHIBA Field Effect Transistor Silicon N Channel MOS Type SSM3K44FS High Speed Switching Applications Unit: mm Analog Switching Applications Compact package suitable for high-density mounting Low ON-resistance : R = 4.0 (max) ( V = 4 V) DS(ON) GS : R = 7.0 (max) ( V = 2.5 V) DS(ON) GS Absolute Maximum Ratings (Ta = 25C) Characteristic Symbol Rating Unit Drain-Source voltage V 30 V DSS Gate-Source voltage V 20 V GSS DC I 100 D Drain current mA Pulse I 200 DP Drain power dissipation (Ta = 25C) P (Note 1) 150 mW D Channel temperature T 150 C ch Storage temperature range T 55 to 150 C JEDEC stg JEITA Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in TOSHIBA 2-2H1B temperature, etc.) may cause this product to decrease in the Weight: 2.4 mg (typ.) reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 2 Note 1: mounted on an FR4 board (25.4 mm 25.4 mm 1.6 mm, Cu Pad : 0.36mm 3) Marking Equivalent Circuit 3 3 N T 1 2 12 Handling Precaution When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. Start of commercial production 2009-12 1 2014-03-01 SSM3K44FS Electrical Characteristics (Ta = 25C) Characteristic Symbol Test Condition Min Typ. Max Unit Gate leakage current I V = 14 V, V = 0 V 1 A GSS GS DS Drain-Source breakdown voltage V I = 0.1 mA, V = 0 V 30 V (BR) DSS D GS Drain Cut-off current I V = 30 V, V = 0 V 1 A DSS DS GS Gate threshold voltage V V = 3 V, I = 0.1 mA 0.8 1.5 V th DS D Forward transfer admittance Y V = 3 V, I = 10 mA 25 mS fs DS D I = 10 mA, V = 4 V 2.2 4.0 D GS Drain-Source ON resistance R DS (ON) I = 10 mA, V = 2.5 V 4.0 7.0 D GS Input capacitance C 8.5 iss Reverse transfer capacitance C V = 3 V, V = 0 V, f = 1 MHz 5.3 pF rss DS GS Output capacitance C 9.4 oss Turn-on time t 50 on V = 5 V, I = 10 mA, DD D Switching time ns V = 0 to 5 V GS Turn-off time t 200 off Switching Time Test Circuit (a) Test circuit (b) V IN 5 V OUT 90% 5 V IN 10% 0 R L 0 V 10 s V DD (c) V V OUT DD 10% V = 5 V DD Duty 1% 90% V : t , t < 5 ns IN r f V DS (ON) t t r f (Z = 50 ) out Common source t t on off Ta = 25C Precaution Let V be the voltage applied between gate and source that causes the drain current (I ) to be low (0.1mA for the th D SSM3K44FS). Then, for normal switching operation, V must be higher than V and V must be lower than GS(on) th, GS(off) V This relationship can be expressed as: V < V < V th. GS(off) th GS(on). Take this into consideration when using the device 2 2014-03-01 50