SSM3K48FU TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (U-MOSIII) SSM3K48FU Load Switching Applications Unit: mm 2.5-V drive Low ON-resistance: R = 3.2 (max) ( V = 4.0 V) DS(ON) GS R = 5.4 (max) ( V = 2.5 V) DS(ON) GS Absolute Maximum Ratings (Ta = 25C) Characteristics Symbol Rating Unit Drain-Source voltage V 30 V DSS Gate-Source voltage V 20 V GSS DC I 100 D Drain current mA Pulse I 400 DP 1. Gate USM Power dissipation P (Note 1) 150 mW 2. Source D 3. Drain Channel temperature T 150 C ch Storage temperature range T 55 to 150 C stg JEDEC Note: Using continuously under heavy loads (e.g. the application of JEITA SC-70 high temperature/current/voltage and the significant change in TOSHIBA 2-2E1E temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. Weight: 6.0 mg (typ.) operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 2 Note 1: Mounted on an FR4 board (25.4 mm 25.4 mm 1.6 mm, Cu Pad: 0.6mm 3) 0.6 mm 1.0 mm Marking Equivalent Circuit (top view) 3 3 DZ 1 2 1 2 Start of commercial production 2010-10 1 2014-03-01 SSM3K48FU Electrical Characteristics (Ta = 25C) Characteristics Symbol Test Condition Min Typ. MaxUnit V I = 0.1 mA, V = 0 V 30 (BR) DSS D GS Drain-Source breakdown voltage V V I = 0.1 mA, V = -10 V (Note 3) 16 (BR) DSX D GS Drain cut-off current I V = 30 V, V = 0 V 1 A DSS DS GS Gate leakage current I V = 12 V, V = 0 V 1 A GSS GS DS Gate threshold voltage V V = 3 V, I = 0.1 mA 0.8 1.5 V th DS D Forward transfer admittance Y V = 3 V, I = 10 mA (Note 2) 33 mS fs DS D I = 10 mA, V = 4 V (Note 2) 2.0 3.2 D GS Drain-Source ON resistance R DS (ON) I = 10 mA, V = 2.5 V (Note 2) 3.0 5.4 D GS Input capacitance C 15.1 iss Reverse transfer capacitance C V = 3 V, V = 0 V, f = 1 MHz 7.8 pF DS GS rss Output capacitance C 12.4 oss Turn-on time t V = 5 V, I = 10 mA, 35 on DD D Switching time ns Turn-off time t V = 0 to 5 V, R = 50 180 GS G off Drain-source forward voltage V I = -100 mA, V = 0 V (Note 2) -0.83 -1.2 V DSF D GS Note 2: Pulse test Note 3: If a reverse bias is applied between gate and source, this device enters V mode. Note that the (BR)DSX drain-source breakdown voltage is lowered in this mode. Switching Time Test Circuit (a) Test circuit (b) V IN 5 V OUT 90% 5 V IN 10% 0 0 V 10 s V DD (c) V V OUT DD 90% V = 5 V DD R = 50 G 10% Duty 1% V DS (ON) t t r f : t , t < 5 ns V IN r f Common Source t t on off Ta = 25C Precaution V can be expressed as voltage between gate and source when low operating current value is I = 0.1 mA for this th D product. For normal switching operation, V requires higher voltage than V and V requires lower voltage GS (on) th GS (off) than V . (Relationship can be established as follows: V < V < V ) th GS (off) th GS (on) Please take this into consideration for using the device. Do not use this device under avalanche mode. It may cause the device to break down. Handling Precaution When handling individual devices (which are not yet mounting on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. 2 2014-03-01 R G R L