Si7170DP Vishay Siliconix N-Channel 30-V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 a V (V) R () Q (Typ.) I (A) DS DS(on) g Definition D g TrenchFET Power MOSFET 0.0034 at V = 10 V GS 40 30 29 nC 100 % R and Avalanche Tested g g 0.0043 at V = 4.5 V GS 40 Compliant to RoHS Directive 2002/95/EC PowerPAK SO-8 APPLICATIONS Notebook PC Core - Low Side S 6.15 mm 5.15 mm 1 S VRM POL 2 S 3 G 4 D D 8 D 7 D 6 D 5 G Bottom View Ordering Information: Si7170DP-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET S ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit Drain-Source Voltage V 30 DS V V Gate-Source Voltage 20 GS g T = 25 C C 40 g T = 70 C C 40 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 28.5 b, c T = 70 C A 22.8 A Pulsed Drain Current I 70 DM g T = 25 C C 40 Continuous Source-Drain Diode Current I S b, c T = 25 C A 4.5 I Single Pulse Avalanche Current 40 AS L = 0.1 mH Single Pulse Avalanche Energy E 80 mJ AS T = 25 C 48 C T = 70 C 31 C Maximum Power Dissipation P W D b, c T = 25 C 5 A b, c T = 70 C 3.2 A Operating Junction and Storage Temperature Range T , T - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 10 s R 20 25 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 2.1 2.6 thJC Notes: a. Based on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/ppg 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 70 C/W. g. Package limited. Document Number: 69981 www.vishay.com S11-1650-Rev. C, 15-Aug-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000Si7170DP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static V V = 0 V, I = 250 A Drain-Source Breakdown Voltage 30 V DS GS D V Temperature Coefficient V /T 33 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 6.4 GS(th) GS(th) J V V = V , I = 250 A Gate-Source Threshold Voltage 1.4 2.6 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 30 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 30 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 30 A On-State Drain Current D(on) DS GS V = 10 V, I = 15 A 0.0027 0.0034 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 10 A 0.0036 0.0043 GS D a g V = 15 V, I = 15 A 90 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 4355 iss C V = 15 V, V = 0 V, f = 1 MHz Output Capacitance 595 pF oss DS GS C Reverse Transfer Capacitance 256 rss C /C Capacitance Ratio 0.056 0.120 rss iss V = 15 V, V = 10 V, I = 20 A 65 100 DS GS D Q Total Gate Charge g 29 45 nC Q Gate-Source Charge V = 15 V, V = 4.5 V, I = 20 A 11.5 gs DS GS D Q Gate-Drain Charge 7.5 gd R Gate Resistance f = 1 MHz 0.2 0.55 1.0 g t Turn-On Delay Time 15 30 d(on) t Rise Time V = 15 V, R = 1.5 10 20 r DD L I 10 A, V = 10 V, R = 1 Turn-Off Delay Time t 35 65 D GEN g d(off) t Fall Time 816 f ns Turn-On Delay Time t 36 65 d(on) t Rise Time V = 15 V, R = 1.5 17 30 r DD L I 10 A, V = 4.5 V, R = 1 Turn-Off Delay Time t 45 80 D GEN g d(off) t Fall Time 20 40 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I T = 25 C 40 S C A a I 70 Pulse Diode Forward Current SM V I = 3 A Body Diode Voltage 0.74 1.1 V SD S Body Diode Reverse Recovery Time t 34 65 ns rr Q Body Diode Reverse Recovery Charge 29 55 nC rr I = 10 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t 17 a ns t Reverse Recovery Rise Time 17 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 69981 2 S11-1650-Rev. C, 15-Aug-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000