3.3 mm Si7317DN www.vishay.com Vishay Siliconix P-Channel 150 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET power MOSFETs f V (V) R ( ) MAX. I (A) Q (TYP.) DS DS(on) D g PowerPAK package 1.2 at V = -10 V -2.8 GS -150 6.5 nC - Low thermal resistance 1.3 at V = -6 V -2.7 GS 100 % R and UIS tested g Material categorization: Available for definitions of compliance please see PowerPAK 1212-8 Single D www.vishay.com/doc 99912 D 8 D 7 D APPLICATIONS 6 S 5 Active clamp circuits in DC/DC power supplies Load switch 11 G 2 SS 3 S 4 S 1 G Top View Bottom View D Ordering Information: Si7317DN-T1-GE3 (lead (Pb)-free and halogen-free) P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V -150 DS V Gate-Source Voltage V 30 GS T = 25 C -2.8 C T = 70 C -2.2 C a, b Continuous Drain Current (T = 150 C) I J D a, b T = 25 C -1.1 A a, b T = 70 C -0.9 A A Pulsed Drain Current (t = 100 s) I -2 DM e T = 25 C -8 C a, b Continuous Source-Drain Diode Current I S a, b T = 25 C -2.7 A Single Pulse Avalanche Current I 4 AS L = 1 mH Single Pulse Avalanche Energy E 8mJ AS T = 25 C 19.8 C T = 70 C 12.7 C a, b Maximum Power Dissipation P W D a, b T = 25 C 3.2 A a, b T = 70 C 2.1 A Operating Junction and Storage Temperature Range T , T -55 to +150 J stg C c, d Soldering Recommendations (Peak Temperature) 260 Notes a. Surface mounted on 1 x 1 FR4 board. b. t = 5 s. c. See solder profile (www.vishay.com/ppg 73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. d. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. e. Package limited. f. Based on T = 25 C. C S15-2640-Rev. B, 16-Nov-15 Document Number: 62892 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 3.3 mmSi7317DN www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYPICAL MAXIMUM UNIT a, b Maximum Junction-to-Ambient t 10 s R 31 39 thJA C/W Maximum Junction-to-Case (Drain) Steady State R 56.3 thJC Notes a. Surface mounted on 1 x 1 FR4 board. b. Maximum under steady state conditions is 81 C/W. SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = -250 A -150 - - V DS GS D V Temperature Coefficient V /T - -150 - DS DS J I = -250 A mV/C D V Temperature Coefficient V /T -5.7 - GS(th) GS(th) J Gate-Source Threshold Voltage V V = V , I = -250 A -2.5 - -4.5 V GS(th) DS GS D Gate-Source Leakage I V = 0 V, V = 30 V - - -100 nA GSS DS GS V = -150 V, V = 0 V - - -1 DS GS Zero Gate Voltage Drain Current I A DSS V = -150 V, V = 0 V, T = 55 C - - -10 DS GS J a On-State Drain Current I V 15 V, V = -10 V -1.6 - - A D(on) DS GS V = -10 V, I = -0.5 A - 1 1.2 GS D a Drain-Source On-State Resistance R DS(on) V = -6 V, I = -0.5 A - 1.05 1.3 GS D a Forward Transconductance g V = -15 V, I = -0.5 A - 3 - S fs DS D b Dynamic Input Capacitance C - 243 365 iss Output Capacitance C V = -75 V, V = 0 V, f = 1 MHz -15- pF oss DS GS Reverse Transfer Capacitance C -11- rss Total Gate Charge Q -6.5 9.8 g Gate-Source Charge Q V = -75 V, V = -10 V, I = -1.1 A -1.5 - nC gs DS GS D Gate-Drain Charge Q -1.9- gd Gate Resistance R f = 1 MHz 1.1 5.5 11 g Turn-On Delay Time t -7 11 d(on) Rise Time t -11 20 r V = -75 V, R = 83.3 DD L ns I -0.9 A, V = -10 V, R = 1 D GEN g Turn-Off Delay Time t -1120 d(off) Fall Time t -10 20 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I T = 25 C - - -16 S C A Pulse Diode Forward Current I -- -2 SM Body Diode Voltage V I = -0.9 A, V = 0 V - -0.8 -1.2 V SD S GS Body Diode Reverse Recovery Time t -32 48 ns rr Body Diode Reverse Recovery Charge Q -48 72 nC rr I = -0.9 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t -27- a ns Reverse Recovery Rise Time t -5- b Notes a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-2640-Rev. B, 16-Nov-15 Document Number: 62892 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000