SiR640DP Vishay Siliconix N-Channel 40 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET a V (V) R ( )I (A) Q (Typ.) DS DS(on) D g Low Q for High Efficiency g 0.0017 at V = 10 V 60 100 % R and UIS Tested GS g 40 34.6 nC Material categorization: 0.0022 at V = 4.5 V 60 GS For definitions of compliance please see www.vishay.com/doc 99912 PowerPAK SO-8 APPLICATIONS S 6.15 mm 5.15 mm 1 Synchronous Rectification D S 2 S DC/DC Converter 3 G 4 D 8 D G 7 D 6 D 5 Bottom View Ordering Information: S SiR640DP-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit Drain-Source Voltage V 40 DS V Gate-Source Voltage V 20 GS a T = 25 C 60 C a T = 70 C 60 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C 45 A b, c T = 70 C 36 A A Pulsed Drain Current (t = 100 s) I 350 DM a T = 25 C 60 C Continuous Source-Drain Diode Current I S b, c T = 25 C 5.6 A I Single Pulse Avalanche Current 40 AS L = 0.1 mH Single Pulse Avalanche Energy E 80 mJ AS T = 25 C 104 C T = 70 C 66.6 C Maximum Power Dissipation P W D b, c T = 25 C 6.25 A b, c T = 70 C 4 A Operating Junction and Storage Temperature Range T , T - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 10 s R 15 20 Maximum Junction-to-Ambient thJA C/W Maximum Junction-to-Case (Drain) Steady State R 0.9 1.2 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 54 C/W. Document Number: 67190 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S13-0830-Rev. B, 22-Apr-13 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiR640DP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 40 V DS GS D V Temperature Coefficient V /T I = 250 A - 5.3 mV/C GS(th) GS(th) J D V V = V , I = 250 A Gate-Source Threshold Voltage 12.3V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 40 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 40 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 30 A On-State Drain Current D(on) DS GS V = 10 V, I = 20 A 0.0014 0.0017 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 20 A 0.0018 0.0022 GS D a g V = 15 V, I = 20 A 110 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 4930 iss C V = 20 V, V = 0 V, f = 1 MHz Output Capacitance 3810 pF oss DS GS C Reverse Transfer Capacitance 314 rss V = 20 V, V = 10 V, I = 20 A 75 113 DS GS D Q Total Gate Charge g 34.6 52 nC Q V = 20 V, V = 4.5 V, I = 20 A Gate-Source Charge 11 gs DS GS D Q Gate-Drain Charge 8.2 gd Gate Resistance R f = 1 MHz 0.4 1.3 2.6 g t Turn-On Delay Time 19 35 d(on) Rise Time t 11 20 V = 20 V, R = 2 r DD L I 10 A, V = 10 V, R = 1 t Turn-Off Delay Time D GEN g 50 90 d(off) t Fall Time 10 20 f ns Turn-On Delay Time t 46 90 d(on) t Rise Time V = 20 V, R = 2 88 170 r DD L I 10 A, V = 4.5 V, R = 1 t 56 110 Turn-Off Delay Time D GEN g d(off) t Fall Time 25 50 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I T = 25 C 60 S C A I 350 Pulse Diode Forward Current (t = 100 s) SM Body Diode Voltage V I = 5 A 0.69 1.1 V SD S t Body Diode Reverse Recovery Time 83 160 ns rr Q Body Diode Reverse Recovery Charge 77 150 nC rr I = 10 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t 26 a ns t Reverse Recovery Rise Time 57 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Document Number: 67190 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S13-0830-Rev. B, 22-Apr-13 2 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000