SiR644DP Vishay Siliconix N-Channel 40 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET a V (V) R () Max. Q (Typ.) I (A) DS DS(on) g D 100 % R and UIS Tested g 0.0027 at V = 10 V 60 Material categorization: GS 40 21.3 nC For definitions of compliance please see 0.0040 at V = 4.5 V 60 GS www.vishay.com/doc 99912 PowerPAK SO-8 APPLICATIONS Synchronous Rectification D S 6.15 mm 5.15 mm DC/DC Converters 1 S 2 DC/AC Inverters S 3 G 4 D G 8 D 7 D 6 D 5 Bottom View S Ordering Information: N-Channel MOSFET SiR644DP-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit Drain-Source Voltage V 40 DS V V Gate-Source Voltage 20 GS a T = 25 C 60 C a T = 70 C C 60 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 32.7 b, c T = 70 C A 26 A I Pulsed Drain Current (t = 100 s) 200 DM a T = 25 C C 60 I Continuous Source-Drain Diode Current S b, c T = 25 C A 4.7 I Single Pulse Avalanche Current 35 AS L = 0.1 mH E mJ Single Pulse Avalanche Energy 61 AS T = 25 C 69 C T = 70 C 44.4 C P Maximum Power Dissipation W D b, c T = 25 C A 5.2 b, c T = 70 C 3.3 A T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f R t 10 s 19 24 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 1.2 1.8 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 65 C/W. Document Number: 62851 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S13-1267-Rev. A, 27-May-13 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiR644DP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static V V = 0 V, I = 250 A Drain-Source Breakdown Voltage 40 V DS GS D V Temperature Coefficient V /T 24 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 4.8 GS(th) GS(th) J V V = V , I = 250 A Gate-Source Threshold Voltage 12.2V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 40 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 40 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 30 A On-State Drain Current D(on) DS GS V = 10 V, I = 20 A 0.0022 0.0027 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 15 A 0.0030 0.0040 GS D a g V = 10 V, I = 20 A 87 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 3200 iss Output Capacitance C V = 20 V, V = 0 V, f = 1 MHz 2460 pF oss DS GS C Reverse Transfer Capacitance 160 rss V = 20 V, V = 10 V, I = 20 A 47 71 DS GS D Q Total Gate Charge g 21.3 32 Q Gate-Source Charge V = 20 V, V = 4.5 V, I = 20 A 7.5 nC gs DS GS D Q Gate-Drain Charge 12 gd Q V = 20 V, V = 0 V Output Charge 60 90 oss DS GS R Gate Resistance f = 1 MHz 0.3 0.7 1.2 g Turn-On Delay Time t 13 26 d(on) t Rise Time V = 20 V, R = 1 510 r DD L I 20 A, V = 10 V, R = 1 Turn-Off Delay Time t 29 55 D GEN g d(off) t Fall Time 510 f ns Turn-On Delay Time t 33 65 d(on) t Rise Time V = 20 V, R = 1 120 240 r DD L I 20 A, V = 7.5 V, R = 1 Turn-Off Delay Time t 33 66 D GEN g d(off) t Fall Time 10 20 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I T = 25 C 60 S C A Pulse Diode Forward Current (t = 100 s) I 200 p SM V I = 5 A Body Diode Voltage 0.74 1.1 V SD S t Body Diode Reverse Recovery Time 54 105 ns rr Q Body Diode Reverse Recovery Charge 59 120 nC rr I = 10 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 23 a ns t Reverse Recovery Rise Time 31 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Document Number: 62851 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S13-1267-Rev. A, 27-May-13 2 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000