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This literature is subject to all applicable copyright laws and is not for resale in any manner.FQD8P10TM F085 100V P-Channel MOSFET December 2010 FQD8P10TM F085 100V P-Channel MOSFET General Description Features These P-Channel enhancement mode power field effect -6.6A, -100V, R = 0.53 V = -10 V DS(on) GS transistors are produced using Fairchilds proprietary, Low gate charge ( typical 12 nC) planar stripe, DMOS technology. Low Crss ( typical 30 pF) This advanced technology has been especially tailored to Fast switching minimize on-state resistance, provide superior switching 100% avalanche tested performance, and withstand high energy pulse in the Improved dv/dt capability avalanche and commutation mode. These devices are well Qualified to AEC Q101 suited for low voltage applications such as audio amplifier, RoHS Compliant high efficiency switching DC/DC converters, and DC motor control. D D G D-PAK GS S Absolute Maximum Ratings T = 25C unless otherwise noted C Symbol Parameter Ratings Units V Drain-Source Voltage -100 V DSS I - Continuous (T = 25C) Drain Current -6.6 A D C - Continuous (T = 100C) -4.2 A C I (Note 1) Drain Current - Pulsed -26.4 A DM V Gate-Source Voltage 30 V GSS E (Note 2) Single Pulsed Avalanche Energy 150 mJ AS I Avalanche Current (Note 1) -6.6 A AR E (Note 1) Repetitive Avalanche Energy 4.4 mJ AR dv/dt Peak Diode Recovery dv/dt (Note 3) -6.0 V/ns Power Dissipation (T = 25C) * 2.5 W P A D Power Dissipation (T = 25C) 44 W C - Derate above 25C 0.35 W/C T , T Operating and Storage Temperature Range -55 to +150 C J STG Maximum lead temperature for soldering purposes, T 300 C L 1/8 from case for 5 seconds Thermal Characteristics Symbol Parameter Typ Max Units R Thermal Resistance, Junction-to-Case -- 2.84 C/W JC R Thermal Resistance, Junction-to-Ambient * -- 50 C/W JA R ance, Junction-to-Ambient -- 110 C/W Thermal Resist JA * When mounted on the minimum pad size recommended (PCB Mount) 2010 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FQD8P10TM F085 Rev. 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