Doc No. TT4-EA-14177
Revision. 2
Product Standards
MOS FET
MTM231232LBF
MTM231232LBF
Silicon P-channel MOSFET
Unit : mm
For Switching
2.0
0.3 0.15
MTM76123 in SMini3 type package
3
Features
Low Drain-source On-state Resistance : RDS(on) typ. = 40 m (VGS = -4 V)
Low Drive Voltage : 2.5 V Drive
Halogen-free / RoHS compliant
(EU RoHS / UL-94 V-0 / MSL : Level 1 compliant)
12
0.9
Marking Symbol :
BL
(0.65)(0.65)
1.3
Packaging
Embossed type (Thermo-compression sealing) : 3 000 pcs / reel (standard)
1. Gate
2. Source
3. Drain
Absolute Maximum Ratings Ta = 25 C Panasonic SMini3-G1-B
Parameter Symbol Rating Unit JEITA SC-70
Drain to Source Voltage VDS -20 V Code SOT-323
Gate to Source Voltage VGS 10 V
Drain Current ID -3 A
*1
IDp -16 A Internal Connection
Drain Current (Pulsed)
*2
PD 500 mW
Total Power Dissipation
Channel Temperature Tch 150 C 3
Storage Temperature Range Tstg -55 to +150 C
Note *1
Pulse width 10 s, Duty cycle 1 %
*2 Measuring on ceramic board at 40 mm 38 mm 0.1 mm.
Absolute maximum rating PD Non-heat sink shall be made 150 mW.
1 2
Pin Name
Gate
1.
2. Source
3. Drain
Page 1of 6
Established : 2012-04-21
Revised : 2013-03-07
1.25
2.1Doc No. TT4-EA-14177
Revision. 2
Product Standards
MOS FET
MTM231232LBF
Electrical Characteristics Ta = 25 C 3 C
Parameter Symbol Conditions Min Typ Max Unit
Drain-source Breakdown Voltage VDSS ID = -1 mA, VGS = 0 V -20 V
Zero Gate Voltage Drain Current IDSS VDS = -20 V, VGS = 0 V -1 A
Gate-source Leakage Current IGSS
VGS = 8 V, VDS = 0 V 10 A
Gate-source Threshold Voltage Vth ID = -1 mA, VDS = -10 V -0.4 -0.85 -1.3 V
RDS(on)1
ID = -1 A, VGS = -4 V 40 55
*1
Drain-source On-state Resistance m
RDS(on)2 ID = -0.5 A, VGS = -2.5 V 45 70
*1
|Yfs| ID = -1 A, VDS = -10 V, f = 1 kHz 3.5 S
Forward transfer admittance
Input Capacitance Ciss 1 000
VDS = -10 V, VGS = 0 V
Output Capacitance Coss 120 pF
f = 1 MHz
Reverse Transfer Capacitance Crss 120
*2
td(on) 25
Turn-on Delay Time VDD = -10 V, VGS = 0 to -4 V
ns
*2
tr ID = -1 A 25
Rise Time
*2
td(off) VDD = -10 V, VGS = -4 to 0 V 120
Turn-off Delay Time
ns
*2
tf ID = -1 A 70
Fall Time
Note Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors.
*1 Pulse test : Pulse width 300 s, Duty cycle 2 %
*2 Measurement circuit for Turn-on Delay Time / Rise Time / Turn-off Delay Time / Fall Time
Page 2of 6
Established : 2012-04-21
Revised : 2013-03-07