TSM080N03EPQ56 RLG Taiwan Semiconductor

TSM080N03E Taiwan Semiconductor N-Channel Power MOSFET 30V, 55A, 8m FEATURES KEY PERFORMANCE PARAMETERS Fast switching PARAMETER VALUE UNIT 100% EAS Guaranteed V 30 V DS Green Device Available V = 10V 8 GS G-S ESD Protection Diode Embedded R (max) m DS(on) V = 4.5V 12.5 GS Q APPLICATION 7.5 nC g Vcore / MB POL Application nd SMPS 2 SR PDFN56 Notes: Moisture sensitivity level: level 3. Per J-STD-020 ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V 30 V DS Gate-Source Voltage V 20 V GS T = 25C 55 C (Note 1) Continuous Drain Current I A D T = 100C 35 C (Note 2) Pulsed Drain Current I 220 A DM Total Power Dissipation T = 25C P 54 W C DTOT (Note 3) Single Pulsed Avalanche Energy E 45 mJ AS (Note 3) Single Pulsed Avalanche Current I 30 A AS Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG THERMAL PERFORMANCE PARAMETER SYMBOL LIMIT UNIT Junction to Case Thermal Resistance R 2.3 C/W JC Junction to Ambient Thermal Resistance R 62 C/W JA Notes: R is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined JA at the solder mounting surface of the drain pins. R is guaranteed by design while R is determined by the users board JA CA design. RJA shown below for single device operation on FR-4 PCB in still air. Document Number: DS P0000014 1 Version: B15 TSM080N03E Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (T = 25C unless otherwise noted) A PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 4) Static Drain-Source Breakdown Voltage V = 0V, I = 250A BV 30 -- -- V GS D DSS Gate Threshold Voltage V = V , I = 250A V 1 1.6 2.5 DS GS D GS(TH) V Gate Body Leakage V = 20V, V = 0V I -- -- 10 A GS DS GSS Zero Gate Voltage Drain Current V = 30V, V = 0V I -- -- 1 DS GS DSS A V = 10V, I = 16A -- 6.5 8 m GS D Drain-Source On-State Resistance R DS(on) V = 4.5V, I = 8A 9.5 12.5 m GS D (Note 5) Dynamic Total Gate Charge Q -- 7.5 -- g V = 15V, I = 20A, DS D Gate-Source Charge Q -- 1.3 -- gs nC V = 4.5V GS Gate-Drain Charge Q -- 4.5 -- gd Input Capacitance C -- 750 -- iss V = 25V, V = 0V, DS GS Output Capacitance C -- 150 -- pF oss f = 1.0MHz Reverse Transfer Capacitance C 110 rss Gate Resistance F = 1MHz, open drain R -- 2.7 -- g (Note 6) Switching Turn-On Delay Time t -- 4.8 -- d(on) V = 15V, DD Turn-On Rise Time t -- 12.5 -- r R = 3.3, ns GEN Turn-Off Delay Time t -- 27.6 -- d(off) I = 15A, V = 10V, D GS Turn-Off Fall Time t -- 8.2 -- f (Note 4) Source-Drain Diode Forward On Voltage I = 1A, V = 0V V -- -- 1 V S GS SD Notes: 1. Current limited by package 2. Pulse width limited by the maximum junction temperature o 3. L = 0.1mH, I = 30A, V = 25V, R = 25, Starting T = 25 C AS DD G J 4. Pulse test: PW 300s, duty cycle 2% 5. For DESIGN AID ONLY, not subject to production testing. 6. Switching time is essentially independent of operating temperature. Document Number: DS P0000014 2 Version: B15