TSM3N80 Taiwan Semiconductor N-Channel Power MOSFET 800V, 3A, 4.2 FEATURES KEY PERFORMANCE PARAMETERS Low R 3.3 (Typ.) DS(ON) PARAMETER VALUE UNIT Low gate charge typical 19nC (Typ.) V 800 V DS Low Crss typical 10.2pF (Typ.) Improved dv/dt capability R (max) 4.2 DS(on) Q 19 nC g APPLICATION Power Supply Lighting TO-220 ITO-220 TO-251(IPAK) TO-252(DPAK) Notes: MSL 3 (Moisture Sensitivity Level) for TO-252 (D-PAK) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A LIMIT PARAMETER SYMBOL UNIT IPAK/DPAK ITO-220 TO-220 Drain-Source Voltage V 800 V DS Gate-Source Voltage V 30 V GS T = 25C 3 C (Note 1) Continuous Drain Current I A D T = 100C 1.83 C (Note 2) Pulsed Drain Current I 12 A DM (Note 3) Single Pulsed Avalanche Energy E 48 mJ AS (Note 3) Single Pulsed Avalanche Current I 3 A AS (Note 3) Repetitive Avalanche Energy E 9.4 mJ AR (Note 4) Repetitive Avalanche Energy dV/dt 4.5 V/ns Total Power Dissipation T = 25C P 94 32 94 W C DTOT Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG THERMAL PERFORMANCE LIMIT PARAMETER SYMBOL UNIT IPAK/DPAK ITO-220 TO-220 Junction to Case Thermal Resistance R C/W 1.33 3.9 1.33 Jc Junction to Ambient Thermal Resistance R C/W 110 62.5 JA Notes: R is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined JA at the solder mounting surface of the drain pins. R is guaranteed by design while R is determined by the users board JA CA design. R shown below for single device operation on FR-4 PCB in still air JA Document Number: DS P0000084 1 Version: F1706 Not Recommended TSM3N80 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (T = 25C unless otherwise noted) A PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 5) Static Drain-Source Breakdown Voltage V = 0V, I = 250A BV V 800 -- -- GS D DSS Gate Threshold Voltage V = V , I = 250A V 2 -- 4 V DS GS D GS(TH) Gate Body Leakage V = 30V, V = 0V I -- -- 100 nA GS DS GSS Zero Gate Voltage Drain Current V = 800V, V = 0V I -- -- 10 A DS GS DSS V = 10V, I = 1.5A R -- 3.3 4.2 Drain-Source On-State Resistance GS D DS(ON) V = 30V, I = 1.5A g -- 3.7 -- S Forward Transfer Conductance DS D fs (Note 6) Dynamic Total Gate Charge Q -- 19 -- g V = 640V, I = 3A, DS D Gate-Source Charge Q -- 4 -- gs nC V = 10V GS Gate-Drain Charge Q -- 7.6 -- gd Input Capacitance C -- 696 -- iss V = 25V, V = 0V, DS GS Output Capacitance C -- 65 -- pF oss f = 1.0MHz Reverse Transfer Capacitance C -- 10.2 -- rss Gate Resistance F = 1MHz, open drain R -- 3.2 -- g (Note 7) Switching Turn-On Delay Time t -- 48 -- d(on) Turn-On Rise Time t -- -- 36 r V = 10V, I = 3A, GS D ns Turn-Off Delay Time V = 400V, R =25 t -- 106 -- DD G d(off) Turn-Off Fall Time t -- 41 -- f (Note 5) Source-Drain Diode Source Current Integral reverse diode I -- -- 3 A S in the MOSFET Source Current (Pulse) I -- -- 12 A SM Diode Forward Voltage I = 3A, V = 0V V -- -- 1.5 V S GS SD Reverse Recovery Time 370 t -- -- ns V = 0V, I =3A, rr GS S dI /dt = 100A/us Reverse Recovery Charge 1.8 F Q -- -- C rr Notes: 1. Current limited by package 2. Pulse width limited by the maximum junction temperature o 3. L = 10mH, I = 3A, V = 50V, R = 25, Starting T = 25 C AS DD G J 4. I 3A, dI/dt 200A/uS, V BV , Starting T = 25C SD DD DSS J 5. Pulse test: PW 300s, duty cycle 2% 6. For DESIGN AID ONLY, not subject to production testing. 7. Switching time is essentially independent of operating temperature. Document Number: DS P0000084 2 Version: F1706 Not Recommended