Si5935CDC Vishay Siliconix Dual P-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 a V (V) R () Q (Typ.) I (A) DS DS(on) g D Definition g 0.100 at V = - 4.5 V TrenchFET Power MOSFETs GS - 4 g 100 % R Tested - 20 0.120 at V = - 2.5 V 6.2 nC g GS - 4 Compliant to RoHS Directive 2002/95/EC 0.156 at V = - 1.8 V - 3.8 GS APPLICATIONS Load Switch for Portable Devices 1206-8 ChipFET Battery Switch 1 S S 1 2 S 1 D G 1 1 Marking Code D S 1 2 DK XXX G G 1 2 Lot Traceability D G 2 2 and Date Code D 2 Part Code Bottom View D D 1 2 Ordering Information: Si5935CDC-T1-E3 (Lead (Pb)-free) Si5935CDC-T1-GE3 (Lead (Pb)-free and Halogen-free) P-Channel MOSFET P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS T = 25 C, unless otherwise noted A Parameter Symbol LimitUnit V - 20 Drain-Source Voltage DS V V Gate-Source Voltage 8 GS g T = 25 C C - 4 T = 70 C - 3.8 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A - 3.1 b, c T = 70 C A A - 2.5 I - 10 Pulsed Drain Current DM T = 25 C - 2.6 C I Source Drain Current Diode Current S b, c T = 25 C A - 1.7 T = 25 C 3.1 C T = 70 C 2.0 C P Maximum Power Dissipation W D b, c T = 25 C A 1.3 b, c T = 70 C A 0.8 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Parameter Symbol Typ.Max.Unit b, f R t 5 s 77 95 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Foot (Drain) Steady State 33 40 thJF Notes: a. Based on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 5 s. d. See Reliability Manual for profile. The ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequade bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 130 C/W. g. Package limited. Document Number: 68965 www.vishay.com S10-0548-Rev. B, 08-Mar-10 1Si5935CDC Vishay Siliconix SPECIFICATIONS T = 25 C, unless otherwise noted J a Parameter Symbol Test Conditions Min.Typ. Max. Unit Static V V = 0 V, I = - 250 A Drain-Source Breakdown Voltage - 20 V DS GS D V Temperature Coefficient V /T I = - 250 A - 19 DS DS J D mV/C V Temperature Coefficient V /T I = - 250 A 2.5 GS(th) GS(th) J D V V = V , I = - 250 A Gate Threshold Voltage - 0.4 - 1.0 V GS(th) DS GS D I V = 0 V, V = 8 V Gate-Body Leakage - 100 nA GSS DS GS V = - 20 V, V = 0 V - 1 DS GS I Zero Gate Voltage Drain Current A DSS V = - 20 V, V = 0 V, T = 55 C - 5 DS GS J b I V - 5 V, V = - 4.5 V - 10 A On-State Drain Current D(on) DS GS V = - 4.5 V, I = - 3.1 A 0.083 0.100 GS D b R V = - 2.5 V, I = - 2.8 A 0.100 0.120 Drain-Source On-State Resistance DS(on) GS D V = - 1.8 V, I = - 2.5 A 0.130 0.156 GS D b g V = - 10 V, I = - 3.1 A 9.5 S Forward Transconductance fs DS D a Dynamic Input Capacitance C 455 iss C V = - 10 V, V = 0 V, f = 1 MHz Output Capacitance 70 pF oss DS GS C Reverse Transfer Capacitance 54 rss Q V = - 10 V, V = - 5 V, I = - 3.1 A 711 g DS GS D Total Gate Charge 6.2 9.3 nC Q Gate-Source Charge V = - 10 V, V = - 4.5 V, I = - 3.1 A 0.85 gs DS GS D Q Gate-Drain Charge 1.75 gd R Gate Resistance f = 1 MHz 1.22 6.1 12.2 g t Turn-On Delay Time 36 d(on) t Rise Time V = - 10 V, R = 4.2 11 17 r DD L I - 2.4 A, V = - 8 V, R = 1 Turn-Off Delay Time t 21 32 D GEN g d(off) t Fall Time 612 f ns Turn-On Delay Time t 10 20 d(on) t Rise Time V = - 10 V, R = 4.2 32 48 r DD L I - 2.4 A, V = - 4.5 V, R = 1 Turn-Off Delay Time t 25 38 D GEN g d(off) t Fall Time 612 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I T = 25 C - 2.6 A S C a I - 10 Pulse Diode Forward Current SM V I = - 2.4 A, V = 0 V Body Diode Voltage - 0.8 - 1.2 V SD S GS Body Diode Reverse Recovery Time t 21 32 ns rr Q Body Diode Reverse Recovery Charge 13 20 nC rr I = - 2.4 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t 17 a ns t Reverse Recovery Rise Time 4 b Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test pulse width 300 s, duty cycle 2 %. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 68965 2 S10-0548-Rev. B, 08-Mar-10