3.0 mm New Product Si5936DU Vishay Siliconix Dual N-Channel 30-V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET a V (V) R ( ) Max. Q (Typ.) DS DS(on) I (A) g Thermally Enhanced PowerPAK D ChipFET Package 0.030 at V = 10 V 6 GS - Small Footprint Area 30 3.5 nC 0.040 at V = 4.5 V - Low On-Resistance 6 GS - Thin 0.8 mm Profile 100 % R Tested g Material categorization: For definitions of compliance PowerPAK ChipFET Dual Marking Code please see www.vishay.com/doc 99912 CF XXX Lot Traceability APPLICATIONS and Date Code Network Part Code System Power DC/DC D D 1 2 G G 1 2 Bottom View S S 1 2 Ordering Information: Si5936DU-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol Limit Unit V Drain-Source Voltage 30 DS V V Gate-Source Voltage 20 GS a T = 25 C C 6 a T = 70 C 6 C Continuous Drain Current (T = 150 C) I J D a, b, c T = 25 C 6 A b, c T = 70 C A A 5.3 I Pulsed Drain Current (t = 300 s) 25 DM a T = 25 C C 6 I Continuous Source-Drain Diode Current S b, c T = 25 C A 1.9 T = 25 C 10.4 C T = 70 C 6.7 C Maximum Power Dissipation P W D b, c T = 25 C A 2.3 b, c T = 70 C A 1.5 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 5 s R 43 55 Maximum Junction-to-Ambient thJA C/W Maximum Junction-to-Case (Drain) Steady State R 9.5 12 thJC Notes: a. Package limited b. Surface mounted on 1 x 1 FR4 board. c. t = 5 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 105 C/W. Document Number: 62804 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S12-2729-Rev. A, 12-Nov-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 1.8 mmNew Product Si5936DU Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static V V = 0 V, I = 250 A Drain-Source Breakdown Voltage 30 V DS GS D V Temperature Coefficient V /T 34 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 4.4 GS(th) GS(th) J V V = V , I = 250 A Gate-Source Threshold Voltage 1.2 2.2 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 30 V, V = 0 V 1 DS GS Zero Gate Voltage Drain Current I A DSS V = 30 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 20 A On-State Drain Current D(on) DS GS V 10 V, I = 5 A 0.025 0.030 GS D a R Drain-Source On-State Resistance DS(on) V 4.5 V, I = 4 A 0.032 0.040 GS D a g V = 15 V, I = 5 A 11 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 320 iss Output Capacitance C V = 15 V, V = 0 V, f = 1 MHz 70 pF oss DS GS C Reverse Transfer Capacitance 38 rss V = 15 V, V = 10 V, I = 7 A 711 DS GS D Q Total Gate Charge g 3.5 5.3 nC Q Gate-Source Charge V = 15 V, V = 4.5 V, I = 7 A 1 gs DS GS D Q Gate-Drain Charge 1.3 gd R Gate Resistance f = 1 MHz 0.8 4 8 g t Turn-On Delay Time 15 30 d(on) t Rise Time V = 15 V, R = 2.8 65 130 r DD L I 5.3 A, V = 4.5 V, R = 1 t Turn-Off Delay Time D GEN g 15 30 d(off) Fall Time t 10 20 f ns t Turn-On Delay Time 510 d(on) Rise Time t 12 25 V = 15 V, R = 2.8 r DD L I 5.3 A, V = 10 V, R = 1 t Turn-Off Delay Time D GEN g 12 25 d(off) Fall Time t 615 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current 6 S C A I Pulse Diode Forward Current 25 SM V I = 5.3 A, V 0 V Body Diode Voltage 0.8 1.2 V SD S GS t Body Diode Reverse Recovery Time 11 20 ns rr Q Body Diode Reverse Recovery Charge 510 nC rr I = 5.3 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 6 a ns t Reverse Recovery Rise Time 5 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 % b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Document Number: 62804 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S12-2729-Rev. A, 12-Nov-12 2 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000