Si7148DP Vishay Siliconix N-Channel 75-V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 a V (V) R () Q (Typ.) I (A) DS DS(on) g D Available 0.011 at V = 10 V 28 GS TrenchFET Power MOSFET 75 33 nC 0.0145 at V = 4.5 V 28 GS 100 % R Tested g APPLICATIONS PowerPAK SO-8 Primary Side Switch S 6.15 mm 5.15 mm 1 S D 2 S 3 G 4 D 8 D 7 G D 6 D 5 Bottom View S Ordering Information: Si7148DP-T1-E3 (Lead (Pb)-free) N-Channel MOSFET Si7148DP-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS T = 25 C, unless otherwise noted A Parameter Symbol LimitUnit Drain-Source Voltage V 75 DS V V Gate-Source Voltage 20 GS T = 25 C 28 C T = 70 C 22 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 28 b, c T = 70 C A 12 A I Pulsed Drain Current 60 DM T = 25 C 28 C I Continuous Source-Drain Diode Current S b, c T = 25 C A 4.3 I Avalanche Current 45 AS L = 0.1 mH E Single-Pulse Avalanche Energy 100 mJ AS T = 25 C 96 C T = 70 C 61 C Maximum Power Dissipation P W D b, c T = 25 C A 5.4 b, c T = 70 C A 3.4 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) Notes: a. Based on T = 25 C. C b. Surface Mounted on 1 x 1 FR4 board. c. t = 10 s. d. See Solder Profile (www.vishay.com/ppg 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. Document Number: 73314 www.vishay.com S09-0273-Rev. B, 16-Feb-09 1Si7148DP Vishay Siliconix THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit a, b R t 10 s 18 23 Maximum Junction-to-Ambient thJA C/W Maximum Junction-to-Case (Drain) Steady State R 1.0 1.3 thJC Notes: a. Surface Mounted on 1 x 1 FR4 board. b. Maximum under Steady State conditions is 65 C/W. SPECIFICATIONS T = 25 C, unless otherwise noted J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 75 V DS GS D V Temperature Coefficient V /T 75 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 6 GS(th) GS(th) J V = V , I = 250 A 1.5 2.0 2.5 DS GS D Gate-Source Threshold Voltage V V GS(th) V = V , I = 5 mA 2.3 DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 75 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 75 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 30 A On-State Drain Current D(on) DS GS V = 10 V, I = 15 A 0.0091 0.011 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 13.5 A 0.012 0.0145 GS D a g V = 15 V, I = 15 A 60 S Forward Transconductance fs DS D b Dynamic Input Capacitance C 2900 iss C V = 35 V, V = 0 V, f = 1 MHz Output Capacitance 370 pF oss DS GS Reverse Transfer Capacitance C 196 rss V = 38 V, V = 10 V, I = 15 A 68 100 DS GS D Q Total Gate Charge g 33 50 nC Gate-Source Charge Q V = 38 V, V = 4.5 V, I = 15 A 9.5 gs DS GS D Q Gate-Drain Charge 16.8 gd R Gate Resistance f = 1 MHz 0.5 1.1 1.7 g t Turn-On Delay Time 33 50 d(on) t Rise Time V = 38 V, R = 3.8 255 390 r DD L I 10 A, V = 4.5 V, R = 1 t Turn-Off Delay Time D GEN g 35 55 d(off) t Fall Time 100 150 f ns t Turn-On Delay Time 17 26 d(on) t Rise Time V = 38 V, R = 3.8 46 70 r DD L I 10 A, V = 10 V, R = 1 t Turn-Off Delay Time D GEN g 39 60 d(off) t Fall Time 18 30 f www.vishay.com Document Number: 73314 2 S09-0273-Rev. B, 16-Feb-09