6 mm6 mm SiZ998DT www.vishay.com Vishay Siliconix Dual N-Channel 30 V (D-S) MOSFETs FEATURES PRODUCT SUMMARY TrenchFET Gen IV power MOSFETs a, g V (V) R ( ) (MAX.) I (A) Q (TYP.) DS DS(on) D g SkyFET low-side MOSFET with integrated 0.0067 at V = 10 V 20 GS Channel-1 30 5.4 nC Schottky 0.0100 at V = 4.5 V 20 GS 100 % R and UIS tested g 0.0028 at V = 10 V 60 GS Channel-2 30 13.2 nC Material categorization: for definitions of 0.0038 at V = 4.5 V 60 GS compliance please see www.vishay.com/doc 99912 PowerPAIR 6 x 5 G 2 S 2 8 D APPLICATIONS 1 S 2 7 S 2 6 CPU core power 5 S /D 1 2 Computer / server peripherals (Pin 9) G 1 D POL 1 N-Channel 1 1 S /D 1 2 MOSFET 2 G Synchronous buck converter 1 3 D 1 4 Schottky 11 D Telecom DC/DC 1 G Diode D 2 1 Top View Bottom View N-Channel 2 MOSFET Ordering Information: S 2 SiZ998DT-T1-GE3 (lead (Pb)-free and halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL CHANNEL-1CHANNEL-2UNIT Drain-Source Voltage V 30 DS V Gate-Source Voltage V +20, -16 GS a a T = 25 C 20 60 C a a T = 70 C 20 60 C Continuous Drain Current (T = 150 C) I J D b, c b, c T = 25 C 18.8 32.8 A c b, c T = 70 C 15 26.2 A A Pulsed Drain Current (t = 100 s) I 90 130 DM T = 25 C 16.8 27.4 C Continuous Source Drain Diode Current I S b, c b, c T = 25 C 3.2 4 A Single Pulse Avalanche Current I 15 20 AS L = 0.1 mH Single Pulse Avalanche Energy E 11.25 20 mJ AS T = 25 C 20.2 32.9 C T = 70 C 12.9 21.1 C Maximum Power Dissipation P W D b, c b, c T = 25 C 3.8 4.8 A b, c b, c T = 70 C 2.4 3.1 A Operating Junction and Storage Temperature Range T , T -55 to +150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS CHANNEL-1 CHANNEL-2 PARAMETER SYMBOL UNIT TYP. MAX. TYP. MAX. b, f Maximum Junction-to-Ambient t 10 s R 26 33 21 26 thJA C/W Maximum Junction-to-Case (Drain) Steady State R 4.7 6.233.8 thJC Notes a. Package limited b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAIR is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 68 C/W for channel-1 and 61 C/W for channel-2. g. T = 25 C. C S16-0001-Rev. B, 11-Jan-16 Document Number: 62979 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 5 mmSiZ998DT www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN. TYP.MAX.UNIT Static V = 0 V, I = 250 A Ch-1 30 - - GS D Drain-Source Breakdown Voltage V V DS V = 0 V, I = 250 A Ch-2 30 - - GS D V = V , I = 250 A Ch-1 1.1 - 2.2 DS GS D Gate Threshold Voltage V V GS(th) V = V , I = 250 A Ch-2 1.1 - 2.2 DS GS D Ch-1 - - 100 Gate Source Leakage I V = 0 V, V = 20 V, -16 V nA GSS DS GS Ch-2 - - 100 Ch-1 - - 1 V = 30 V, V = 0 V DS GS Ch-2 - - 150 A Zero Gate Voltage Drain Current I DSS Ch-1 - - 5 V = 30 V, V = 0 V, T = 55 C DS GS J Ch-2 - - 3 mA Ch-1 20 - - b On-State Drain Current I V 5 V, V = 10 V A D(on) DS GS Ch-2 20 - - V = 10 V, I = 15 A Ch-1 - 0.0047 0.0067 GS D V = 10 V, I = 19 A Ch-2 - 0.0022 0.0028 GS D b Drain-Source On-State Resistance R DS(on) V = 4.5 V, I = 12 A Ch-1 - 0.0065 0.0100 GS D V = 4.5 V, I = 15 A Ch-2 - 0.0030 0.0038 GS D V = 10 V, I = 15 A Ch-1 - 80 - DS D b Forward Transconductance g S fs V = 10 V, I = 19 A Ch-2 - 165 - DS D a Dynamic Ch-1 - 930 - Input Capacitance C iss Ch-2 - 2620 - Ch-1 - 325 - Channel-1 Output Capacitance C pF oss V = 15 V, V = 0 V, f = 1 MHz DS GS Ch-2 - 902 - Ch-1 - 21 - Channel-2 Reverse Transfer Capacitance C rss V = 15 V, V = 0 V, f = 1 MHz Ch-2 - 55 - DS GS Ch-1 - 0.023 0.046 C /C Ratio rss iss Ch-2 - 0.021 0.042 Ch-1 - 12 18 V = 15 V, V = 10 V, I = 20 A DS GS D Ch-2 - 29.5 44.3 Total Gate Charge Q g Ch-1 - 5.4 8.1 Ch-2 - 13.2 19.8 Channel-1 V = 15 V, V = 4.5 V, I = 20 A DS GS D Ch-1 - 3 - Gate-Source Charge Q nC gs Ch-2 - 7.1 - Channel-2 V = 15 V, V = 4.5 V, I = 20 A Ch-1 - 0.75 - DS GS D Gate-Drain Charge Q gd Ch-2 - 1.3 - Ch-1 - 10 - Output Charge Q V = 15 V, V = 0 V oss DS GS Ch-2 - 30 - Ch-1 0.3 1.5 3 Gate Resistance R f = 1 MHz g Ch-2 0.2 1.1 2.2 S16-0001-Rev. B, 11-Jan-16 Document Number: 62979 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000