New Product SiZ790DT Vishay Siliconix Dual N-Channel 30 V (D-S) MOSFETs with Schottky Diode FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 V (V) R ()I (A) Q (Typ.) DS DS(on) D g Definition a 0.0093 at V = 10 V GS 16 SkyFET Monolithic TrenchFET Channel-1 30 7.7 nC a Power MOSFETs and Schottky Diode 0.0130 at V = 4.5 V 16 GS 100 % R and UIS Tested g a 0.0047 at V = 10 V 35 GS Compliant to RoHS Directive 2002/95/EC Channel-2 30 17 nC a 0.0059 at V = 4.5 V 35 GS APPLICATIONS D 1 System Power - Notebook PowerPAIR 6 x 3.7 - Server Pin 1 G 1 POL 3.73 mm G1 1 D 1 Synchronous Buck 2 D 1 N-Channel 1 Converter S /D 1 2 D 1 MOSFET 3 G S /D 2 1 2 Schottky Pin 7 S Diode 2 G2 6 6 mm S 2 5 N-Channel 2 MOSFET 4 S 2 Ordering Information: SiZ790DT-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol Channel-1Channel-2Unit V 30 Drain-Source Voltage DS V Gate-Source Voltage V 20 GS a a T = 25 C 16 35 C a a T = 70 C 16 35 C Continuous Drain Current (T = 150 C) I J D b, c b, c T = 25 C 12.9 23.4 A b, c b, c T = 70 C A 10.3 18.7 A I Pulsed Drain Current (t = 300 s) 70 100 DM a a T = 25 C 16 35 C I Continuous Source Drain Diode Current S b, c b, c T = 25 C A 3.2 3.8 I Single Pulse Avalanche Current 16 30 AS L = 0.1 mH Single Pulse Avalanche Energy E 13 45 mJ AS T = 25 C 27 48 C T = 70 C 17 31 C Maximum Power Dissipation P W D b, c b, c T = 25 C 3.9 4.6 A b, c b, c T = 70 C A 2.5 3 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Channel-1 Channel-2 Parameter Symbol Typ. Max. Typ. Max. Unit b, f t 10 s R 24 32 20 27 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 3.5 4.6 2 2.6 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAIR is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 67 C/W for channel-1 and 65 C/W for channel-2. Document Number: 67669 www.vishay.com S11-2380-Rev. B, 28-Nov-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000New Product SiZ790DT Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static V = 0 V, I = 250 A Ch-1 30 GS D V Drain-Source Breakdown Voltage DS V = 0 V, I = 250 A Ch-2 30 GS D V V = V , I = 250 A Ch-1 1 2.2 DS GS D V Gate Threshold Voltage GS(th) V = V , I = 250 A Ch-2 1.1 2.2 DS GS D Ch-1 100 Gate Source Leakage I V = 0 V, V = 20 V nA GSS DS GS Ch-2 100 V = 30 V, V = 0 V Ch-1 1 DS GS V = 30 V, V = 0 V Ch-2 50 200 DS GS Zero Gate Voltage Drain Current I A DSS V = 30 V, V = 0 V, T = 55 C Ch-1 5 DS GS J V = 30 V, V = 0 V, T = 55 C Ch-2 140 1400 DS GS J V 5 V, V = 10 V Ch-1 15 DS GS b I A On-State Drain Current D(on) V 5 V, V = 10 V Ch-2 20 DS GS V = 10 V, I = 15 A Ch-1 0.0075 0.0093 GS D V = 10 V, I = 20 A Ch-2 0.0038 0.0047 GS D b R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 13 A Ch-1 0.0105 0.0130 GS D V = 4.5 V, I = 20 A Ch-2 0.0048 0.0059 GS D V = 15 V, I = 15 A Ch-1 48 DS D b g S Forward Transconductance fs V = 15 V, I = 20 A Ch-2 85 DS D a Dynamic Ch-1 830 C Input Capacitance iss Channel-1 Ch-2 1980 V = 15 V, V = 0 V, f = 1 MHz DS GS Ch-1 185 C Output Capacitance pF oss Ch-2 455 Channel-2 Ch-1 80 V = 10 V, V = 0 V, f = 1 MHz DS GS C Reverse Transfer Capacitance rss Ch-2 165 V = 15 V, V = 10 V, I = 15 A Ch-1 15.6 24 DS GS D V = 15 V, V = 10 V, I = 20 A Ch-2 36 54 DS GS D Q Total Gate Charge g Ch-1 7.7 12 Channel-1 Ch-2 17 26 nC V = 15 V, V = 4.5 V, I = 15 A DS GS D Ch-1 2.6 Q Gate-Source Charge gs Ch-2 5.7 Channel-2 Ch-1 3 V = 15 V, V = 4.5 V, I = 20 A DS GS D Q Gate-Drain Charge gd Ch-2 5 Ch-1 0.2 1 2 R Gate Resistance f = 1 MHz g Ch-2 0.2 0.9 1.8 Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test pulse width 300 s, duty cycle 2 %. www.vishay.com Document Number: 67669 2 S11-2380-Rev. B, 28-Nov-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000